vishay siliconix dg2016, dg2026 document number: 72030 s11-1185-rev. d, 13-jun-11 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 high-bandwidth, low voltage, dual spdt analog switches description the dg2016/dg2026 are monolithic cmos dual single-pole/double-throw (spdt) analog switchs. they are specifically designed for low-voltage, high bandwidth applications. the dg2016/dg2026?s on-resistance (3 ?? at 2.7 v), matching and flatness are guaranteed over the entire analog voltage range. wide dynamic per formance is achieved with better than - 80 db for both cross-talk and off-isolation at 1mhz. both spdt?s operate with independent control logic, conduct equally well in both directions and block signals up to the power supply level when off. break-before-make is guaranteed. with fast switching speeds, low on-resistance, high bandwidth, and low charge injection, the dg2016/dg2026 are ideally suited for audio and video switching with high linearity. built on vishay siliconix?s low voltage cmos technology, the dg2016/dg2026 contain an epit axial layer which prevents latch-up features ? halogen-free according to iec 61249-2-21 definition ? single supply (1.8 v to 5.5 v) ? low on-resistance - r on : 2.4 ? ? crosstalk and off isolation: - 81 db at 1 mhz ? msop-10 package ? compliant to rohs directive 2002/95/ec benefits ? reduced power consumption ? high accuracy ? reduce board space ? low-voltage logic compatible ? high bandwidth applications ? cellular phones ? speaker headset switching ? audio and video signal routing ? pcmcia cards ? low-voltage data acquisition ?ate functional block diagram and pin configuration com1 nc1 v+ 1 2 3 10 9 top view in1 no1 gnd 8 dg2016dq ? msop-10 nc2 com2 4 5 7 no2 in2 6 com1 no1 v+ 1 2 3 10 9 top view in1 nc1 gnd 8 dg2026dq ? msop-10 no2 com2 4 5 7 nc2 in2 6 truth table logic nc1 and nc2 no1 and no2 0onoff 1offon ordering information temp range package part number - 40 c to 85 c msop-10 dg2016dq-t1-e3 dg2026dq-t1-e3
www.vishay.com 2 document number: 72030 s11-1185-rev. d, 13-jun-11 vishay siliconix dg2016, dg2026 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by inte rnal diodes. limit forward diode current to maximum curr ent ratings. b. all leads welded or soldered to pc board. c. derate 4 mw/c above 70 c. absolute maximum ratings parameter limit unit reference v+ to gnd - 0.3 to + 6 v in, com, nc, no a - 0.3 to (v+ + 0.3) continuous current (any terminal) 50 ma peak current (pulsed at 1 ms, 10 % duty cycle) 200 storage temperature (d suffix) - 65 to 150 c power dissipation (packages) b msop-10 c 320 mw specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %, v in = 0.4 v or 2 v e temp. a limits - 40 c to 85 c unit min. b typ. c max. b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 2.7 v, v com = 0.2 v/1.5 v, i no , i nc = 10 ma room full 34.8 5.3 ? r on flatness r on flatness v+ = 2.7 v, v com = 0 to v+, i no , i nc = 10 ma room 1.6 switch off leakage current f i no(off) i nc(off) v+ = 3.3 v v no , v nc = 0.3 v/3 v, v com = 3 v/0.3 v room full - 1 - 10 1 10 na i com(off) room full - 1 - 10 1 10 channel-on leakage current f i com(on) v+ = 3.3 v, v no , v nc = v com = 0.3 v/3 v room full - 1 - 10 1 10 digital control input high voltage d v inh full 1.6 v input low voltage v inl full 0.4 input capacitance c in full 5 pf input current i inl or i inh v in = 0 v or v+ full 1 1 a dynamic characteristics tu r n - o n t i m e t on v no or v nc = 2 v, r l = 50 ? , c l = 35 pf room full 28 53 59 ns turn-off time t off room full 13 38 38 break-before-make time t d full 1 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 ? room 38 pc off-isolation d oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room - 78 db crosstalk d x ta l k room - 82 n o , n c off capacitance d c no(off) v in = 0 v or v+, f = 1 mhz room 15 pf c nc(off) room 15 channel-on capacitance d c no(on) room 49 c nc(on) room 45 power supply power supply current i+ v in = 0 v or v+ full 0.01 1 a
document number: 72030 s11-1185-rev. d, 13-jun-11 www.vishay.com 3 vishay siliconix dg2016, dg2026 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. guarantee by design, nor subjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5 v leakage testing, not production tested. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. specifications (v+ = 5 v) parameter symbol test conditions otherwise unless specified v+ = 5 v, 10 %, v in = 0.8 v or 2.4 v e temp. a limits - 40 c to 85 c unit min. b typ. c max. b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 4.5 v, v com = 3 v, i no , i nc = 10 ma room full 2.4 4 4.3 ? r on flatness r on flatness v+ = 4.5 v, v com = 0 to v+, i no , i nc = 10 ma room 1.2 switch off leakage current i no(off) i nc(off) v+ = 5.5 v v no , v nc = 1 v/4.5 v, v com = 4.5 v/1 v room full - 1 - 10 1 10 na i com(off) room full - 1 - 10 1 10 channel-on leakage current i com(on) v+ = 5.5 v, v no , v nc = v com =1 v/4.5 v room full - 1 - 10 1 10 digital control input high voltage d v inh full 2 v input low voltage v inl full 0.8 input capacitance c in full 5 pf input current i inl or i inh v in = 0 v or v+ full 1 1 a dynamic characteristics tu r n - o n t i m e t on v no or v nc = 3 v, r l = 50 ? , c l = 35 pf room full 23 48 52 ns turn-off time t off room full 833 35 break-before-make time t d full 1 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 ? room 79 pc off-isolation d oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room - 81 db crosstalk d x ta l k room - 82 source-off capacitance d c no(off) v in = 0 v or v+, f = 1 mhz room 14 pf c nc(off) room 14 channel-on capacitance d c no(on) room 48 c nc(on room 44 power supply power supply range v+ 1.8 5.5 v power supply current i+ v in = 0 v or v+ full 0.01 1 a
www.vishay.com 4 document number: 72030 s11-1185-rev. d, 13-jun-11 vishay siliconix dg2016, dg2026 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) r on vs. v com and supply voltage supply current vs. temperature leakage current vs. temperature 0 1 2 3 4 5 6 7 8 012345 v com - analog voltage (v) v+ = 3.0 v - on-resistance ( ? ) r on t = 25 c i s = 10 ma v+ = 5.0 v - 60 - 40 - 20 0 20 40 60 80 100 1 1000 10 000 temperature ( c) v+ = 5 v v in = 0 v 10 100 i+ - supply current (na) v+ = 3 v v in = 0 v - 60 - 40 - 20 0 20 40 60 80 100 1 1000 10 000 temperature ( c) v+ = 5 v 10 100 leakage current (pa) i no(off) , i nc(off) i com(off) i com(on) r on vs. analog voltage and temperature supply current vs. input switching frequency leakage vs. analog voltage 0 1 2 3 4 5 012345 v com - analog voltage (v) 25 c - on-resistance ( ? ) r on v+ = 3 v - 40 c 85 c 25 c v+ = 5 v - 40 c 85 c input switching frequency (hz) i+ - supply current (a) 10 10 k 100 k 10 m 100 1 k 1 m 10 ma 1 ma 100 a 10 a 1 a v+ = 5 v 100 na 10 na - 100 - 75 - 50 - 25 0 25 50 75 100 012345 v com , v no , v nc - analog voltage (v) leakage current (pa) v+ = 5 v i no(off) , i nc(off) i com(off) i com(on)
document number: 72030 s11-1185-rev. d, 13-jun-11 www.vishay.com 5 vishay siliconix dg2016, dg2026 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) test circuits switching time vs. temperature switching threshold vs. supply voltage 0 10 20 30 40 50 60 - 60 - 40 - 20 0 20 40 60 80 100 r l = 50 ? / t on - switching time (s) t off t on v+ = 5 v t off v+ = 5 v t off v+ = 3 v temperature ( c) t on v+ = 3 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 01234567 v+ - supply voltage (v) - switching threshold (v) v t insertion loss, off-isolation crosstalk vs. frequency charge injection vs. analog voltage 100 k - 90 10 m 10 - 70 - 50 100 m 1 g 1 m frequency (hz) (db) loss, oirr, x talk - 30 - 10 loss oirr x ta l k v+ = 5 v r l = 50 ? - 80 - 60 - 40 - 20 0 20 40 60 80 012345 v com - analog voltage (v) q - charge injection (pc) v+ = 5 v v+ = 3 v figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 50 ? v out gnd v+ 50 % 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. 0 v switch output 0.9 x v out t r < 5 ns t f < 5 ns v inh v inl v out =v com r l r l +r on
www.vishay.com 6 document number: 72030 s11-1185-rev. d, 13-jun-11 vishay siliconix dg2016, dg2026 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72030 . figure 2. break-before-make interval c l (includes fixture and stray capacitance) nc v no no v nc 0 v logic input switch output v o v nc = v no t r < 5 ns t f < 5 ns 90 % t d t d in com v+ gnd v+ c l 35 pf v o r l 50 ? v inl v inh figure 3. charge injection off on on in ? v out v out q = ? v out x c l c l = 1 nf r gen v out com v in = 0 - v+ in v gen gnd v+ v+ in depends on switch configuration: input polarity determined by sense of switch. + nc or no figure 4. off-isolation in gnd nc or no 0 v, 2.4 v 10 nf com off isolation = 20 log v com v no/ nc r l analyzer v+ v+ com figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
notes: 1. die thickness allowable is 0.203 0.0127. 2. dimensioning and tolerances per ansi.y14.5m-1994. 3. dimensions ?d? and ?e 1 ? do not include mold flash or protrusions, and are measured at datum plane -h- , mold flash or protrusions shall not exceed 0.15 mm per side. 4. dimension is the length of terminal for soldering to a substrate. 5. terminal positions are shown for reference only. 6. formed leads shall be planar with respect to one another within 0.10 mm at seating plane. 7. the lead width dimension does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the lead foot. minimum space between protrusions and an adjacent lead to be 0.14 mm. see detail ?b? and section ?c-c?. 8. section ?c-c? to be determined at 0.10 mm to 0.25 mm from the lead tip. 9. controlling dimension: millimeters. 10. this part is compliant with jedec registration mo-187, variation aa and ba. 11. datums -a- and -b- to be determined datum plane -h- . 12. exposed pad area in bottom side is the same as teh leadframe pad size. 5 n n-1 a b c 0.20 (n/2) tips) 2x n/2 2 1 0.60 0.50 0.60 e top view e see detail ?b? -h- 3 d -a- seating plane a 1 a 6 c 0.10 side view 0.25 bsc 4 l -c- seating plane 0.07 r. min 2 places parting line detail ?a? (scale: 30/1) 0.48 max detail ?b? (scale: 30/1) dambar protrusion 7 c 0.08 m b s a s b b 1 with plating base metal c 1 c section ?c-c? scale: 100/1 (see note 8) see detail ?a? a 2 0.05 s c c ? 3 e 1 -b- end view e1 0.95 package information vishay siliconix document number: 71245 12-jul-02 www.vishay.com 1 msop: 10?leads jedec part number: mo-187, (variation aa and ba) n = 10l millimeters dim min nom max note a - - 1.10 a 1 0.05 0.10 0.15 a 2 0.75 0.85 0.95 b 0.17 - 0.27 8 b 1 0.17 0.20 0.23 8 c 0.13 - 0.23 c 1 0.13 0.15 0.18 d 3.00 bsc 3 e 4.90 bsc e 1 2.90 3.00 3.10 3 e 0.50 bsc e 1 2.00 bsc l 0.40 0.55 0.70 4 n 10 5 0 4 6 ecn: t-02080?rev. c, 15-jul-02 dwg: 5867
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.
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